Random Error Reduction Scheme for Combinational Stochastic Circuit

IR-drop Reduction Through Combinational Circuit Partitioning

IR-drop problem is becoming more and more important. Previous works dealing with power/ground (P/G) network peak current reduction to reduce the IR-drop problem only focus on synchronous sequential logic circuits which consider the combinational parts as unchangeable [4],[5]. However, some large combinational circuits which work alone in one clock cycle can create large current peaks and induce...

Non-redundant Scheme for Arbitrary Error Detection in Combinational Circuits

The paper deals with synthesis technique for designing circuits with on-line errors detection. We present a new technique of designing a concurrently checking functional circuit by partitioning the circuit into two independent sub-circuits. The technique does not require any redundant coding variables. Instead, we propose to utilize some input variables. These variables are transferred directly...

A New Circuit Scheme for Wide Dynamic Circuits

In this paper, a new circuit scheme is proposed to reduce the power consumption of dynamic circuits. In the proposed circuit, an NMOS keeper transistor is used to maintain the voltage level in the output node against charge sharing, leakage current and noise sources. Using the proposed keeper scheme, the voltage swing on the dynamic node is lowered to reduce the power consumption of wide fan-in...

Difference between combinational circuit and sequential circuit pdf

Error Distributions for Random Grid Approximations of Multidimensional Stochastic Integrals

This paper proves joint convergence of the approximation error for several stochastic integrals with respect to local Brownian semimartingales, for non-equidistant and random grids. The conditions needed for convergence are that the Lebesgue integrals of the integrands tend uniformly to zero and that the squared variation and covariation processes converge. The paper also provides tools which s...